Clock-gating checks 时钟门锁检查 ; 时钟门的检查
clock gating circuit 门控时钟
power and clock gating 功率和时钟门控
clock-gating 门控时钟
clock-gating setup and hold 门的建立和保持
fine grain Aggressive Clock Gating 技术包括精细度渐进时钟门控
Programmable clock Gating 可编程门控时钟技术
Globle Clock Gating 全局时钟开关
The clock gating technique is merely applicable to single edge-triggered flip-flop. It is a special kind of clock edge control technique.
而门控时钟技术只适用于单边沿触发器,是一种特殊的时钟边沿控制技术。
参考来源 - 时钟边沿控制技术及低功耗触发器研究Based on this, the clock management unit is introduced and the clock gating technique is employeed for the low power design of the processor core.
在此基础上,本文引入了时钟管理单元并采用门控时钟技术降低功耗。
参考来源 - 一种16位数字信号处理器内核的研究与设计Under the guide of the OSH-ASIP design method, a CI-dedicated low-power DSP is designed and implemented in 0.18μm CMOS process, with various low-power techniques including instruction-set reduction, wait mode, loop cache, memory partitioning, operand isolation and clock gating.
最后,在OSH-ASIP设计方法的指导下,综合运用指令集简化、等待模式、循环暂存、存储器切割、操作数隔离和时钟门控等多种低功耗设计技术,在0.18μm CMOS工艺下设计并实现了一款人工耳蜗专用的低功耗DSP。
参考来源 - 一种双模人工耳蜗系统及其低功耗数字信号处理器的设计·2,447,543篇论文数据，部分数据来源于NoteExpress
以上来源于: WordNet
There's of course extensive clock gating around the chip, but obviously the big change is power gating which AMD hasn't had up to this point (Bobcat is also power gated).
当然，频率和功耗控制是对整个芯片都起作用的，但是显然，AMD有了巨大的改进，功率门限可是以前做不到的(山猫也实现了功率门限)。
SMU module adopts the clock-gating method was applied to the survivor path storage block, reduce the survivor path storage memory power dissipation effectively.
在幸存路径管理模块采用门控时钟的方法，有效地降低了对幸存路径存储部分的功耗。
For RISC processer, clock-gating can reduce power by 18.8%.
对于risc微处理器，门控时钟技术可以降低功耗18.8%。
应用推荐